Product news

Full support for IAR Systems' probe JTAGjet-Trace

JTAGjet-Trace offers advanced trace functionality for ARM and ARM Cortex-based applications. It can perform trace acquisition of up to 400 MSamples/sec and has a capture capacity of 18MB in the trace buffer.

Improved optimizations

More than 10% improvements on industry-standard benchmarks compared to previous version.

Functionality for adding project connections to external code generation tools

Files or file packages generated by external code generation tools can be imported and IAR Embedded Workbench automatically detects changes in the generated file set, This enables automated integration with Freescale Processor Expert, and other device configuration tools.

Possibility to simultaneously connect to multiple SWD devices

Two instances of IAR Embedded Workbench can now access one core each in a multi-core device via SWD.

Source browser call graph for easy function hierarchy navigation

A new display of source browser call graph provides a good overview of function calls. Developers can choose to display all possible calls to or from a selected function with the calls listed in a dedicated Call Graph window.

New license management system

The new LMS that is used with this release introduces new features like commuter licenses, automatic license activation, and support for virtual servers. It is easier to administrate and a single installer concept enables easy transfer between all variants of IAR Embedded Workbench for a certain product through a license upgrade.

I-jet support

The IAR I-jet debug probe is supported.

Key features:

• Hi-speed USB 2.0 interface (480 Mbps)
• Target power can be supplied
• JTAG and Serial Wire Debug (SWD) clocks up to 32 MHz
• SWO frequency up to 60/30 MHz (UART/Manchester encoding)
• Target power consumption can be measured at up to 200 kHz with high accuracy
• Supports target voltage range from 1.65V to 5V

Major speed optimizations

The new version shows 30-40% improvements on standard industry benchmark scores.

New text editor and source browser

A new text editor and source browser are introduced in this version. The new features include auto completion, parameter hint, code folding, block select, block indent, bracket matching, zoom and word/paragraph navigation. The new source browser adds features like Go to Declaration and Find All References to symbols.

Support for new ARM cores

The Cortex-M0+, Cortex-R5, Cortex-R7, Cortex-A7, and Cortex-A15 cores are now supported.

Improved stack usage calculation

The stack usage calculation now supports recursion, C++ (except exceptions). The new linker directive check that can be used for calculating the stack usage at link time to verify that the used stack space does not exceed the allocated memory.

Improved inline assembler

The inline assembler has been improved and expanded with a large number of new operands contraints and modifiers.

Custom SFR window

It is now possible to define custom SFR's (special function registers) in C-SPY with selectable access size and type.

Support for new devices

Several new devices are now supported.

New example projects

Over 3100 example projects for various evaluation boards are included in the product.

Stack usage analysis

With stack usage analysis enabled, a stack usage section will be added to the linker map file with listings of the maximum stack depth for each call graph root. The analysis process can be customized to take into account such constructs as calls via function pointers and recursion. The output can optionally be generated in XML format for post-processing activities.

Extended inline assembler

The inline assembler have been extended with the possiblity to take input arguments, have return values, and read or write to C symbols. The syntax is similar to the syntax used in GNU GCC.

Cortex-M3/M4 speed optimizations

The compiler optimizer have been tuned to generate faster code, with special focus on the coremark and DSP library code bases.

JTAGjet-Trace integration

Signum JTAGjet-Trace, an advanced debug probe for high-end applications, is now integrated with its trace module in the debugger, making it possible to take full advantage of the trace capabilities on Cortex-A and Cortex-R devices when debugging complex systems.

ITM event plot function in timeline window

The Timeline window has been enhanced with a graphical event log for Cortex-M3/M4 users. To aid in analyzing the behavior of your code, place predifined macro functions at places of interest in the code, and when these points are reached during execution, event messages will be sent and appear in the Timeline window. The plotted events can be correlated with the source code, detailed context timing is also provided.

Function exclude mechanism in profiler

The function profiling window has been enhanced with a function hide mechanism. Functions that are not of interest can be filtered out. This can be useful when working with an RTOS; RTOS kernel functions can be filtered out, to get a focused picture of where the execution time is spent in the actual application code.

Support for Texas Instruments Stellaris ICDI (new in 6.21.3)

Support has been added for the Texas Instruments Stellaris ICDI debug interface. The same C-SPY debugger driver is used for both the FTDI- and the ICDI-interface. This debugger driver is now called TI Stellaris.

RTOS awareness support for AVIX-RT (new in 6.21.2)

An RTOS awareness plug-in for AVIX-RT is now included.

Support for ST ST-LINK version 2 with SWO

The ST debug probe ST-LINK version 2 is now supported. The Serial Wire Output (SWO) functionality is also implemented, enabling features such as function profiling and interrupt tracing for all STM32 devices.

Support for TI XDS100

The TI XDS100v2 emulator is now supported. It provides JTAG access to TI devices. Currently ARM Cortex-R4 based devices are supported.

Support for new devices

A complete list of all supported devices is available here...

DSP library for Cortex-M3/M4

The ARM CMSIS DSP library is now supported and delivered with the product. The library comes with a powerful collection of DSP functionality; FIR/IIR filters, FFT, DCT, Clarke and Park transforms, PID controller and much more. See the CMSIS DSP Software Library documentation for more information.

Cortex-A

Support for code generation for and debugging of ARM Cortex-A8 cores.

Cortex-A9

Support for code generation for and debugging of ARM Cortex-A9 cores.

Subversion

The version control integration has been extended with support for Subversion (SVN).

Power debugging enhancements

• The J-Link Ultra now supports sampling rates up to 10 kHz.
• Power data can be filtered based on a threshold value.
• Execution can be stopped based on a threshold value (power breakpoint).
• Power samples can be logged to a file, either the collected data up to that point or live acquisition.

Automatic selection of printf/scanf formatter

The compiler/linker will parse the printf/scanf format specifiers and select the smallest possible formatter from the library.

Virtual Function Elimination (VFE)

The compiler/linker will optimize C++ applications and remove unused virtual functions.

RTOS context sensitive help

Context-sensitive help is available for some RTOS'es, and gives easy access to descriptions of API functions.

Support for full C++

Full support has been implemented for C++ conforming to the ISO/IEC 14882:2003 standard. Using Embedded C++ or C++ without exceptions and rtti are optional.

Support for ARM Cortex-A

The ARM Cortex-A5 and Cortex-A8 cores are now supported.

Power debugging

Power debugging functionality has been added. It is now possible to measure the power consumption in the system correlated to the source code. It is also possible to do power profiling on functions during specified time intervals. This functionality has been available since Service Pack 5.50.5.

Freescale MQX RTOS awareness

An RTOS-awareness plug-in has been added for Freescale MQX.

FreeRTOS/OPENRTOS awareness

An RTOS-awareness plug-in for FreeRTOS/OPENRTOS has been included in the product.

P&E Micro JTAG probes

The P&E Micro Multilink, Cyclone and OSJTAG are supported.

CMSIS SVD

The debugger supports the CMSIS System View Description files to display peripheral register content.

C-SPY Debugging Guide introduced

A new user guide called C-SPY Debugging Guide has been introduced. The purpose of this guide is to help you fully use the features in the IAR C-SPY Debugger for debugging youre application.

• Support for ARM Cortex-M4
• Graphical visualization from trace data of call stack, variables and interrupt activity in single timeline window
• Position independent code and data
• (PIC/PID) Profiling based on ETM trace capture

• Support for code generation and debugging of ARM Cortex-R4F cores with VFP unit.
• Cortex-M0 speed optimizations
• Trace start and stop triggers
• SWO support in J-Trace for Cortex-M3
• Enhanced Find in files
• New device support
• Over 1700 example projects for various evaluation boards

• Information Center
• Support for Cortex-R4
• Support for Cortex-M0
• J-Trace for Cortex-M3
• Trace start and stop triggers
• Direct flash erase and download
• Debugging multiple images
• Cortex-M3 data breakpoint enhancements
• Example project
• New supported devices
• New product package added for Cortex-M0, M1 and M3 users

• New Cortex-M3 debug features
• Compiler size optimizations
• Compressed initializers
• MISRA C:2004 support
• ST ST-LINK debug probe
• ARM7EJ-S core support
• New device support and example projects