Actel's CoreMP7 is a soft IP version of the popular ARM7TDMI-S, that has been optimized to maximize speed and minimize size in Actel's M7 ProASIC3 and M7 Fusion Flash-based FPGAs. With CoreMP7, Actel is bringing ARM7 to the masses with no upfront licensing fees and no royalties. FPGA users no longer have to settle for a proprietary 32-bit processor core. Instead, they can use the industry-standard ARM7 with its well-known architecture and popular instruction set. CoreMP7 executes the ARMv4T instruction set architecture and implements all 32-bit ARM7 instructions and all 16-bit Thumb® instructions. The processor has a 3-stage pipeline, 32-bit ALU, 32-bit register file, a 32-bit external address and data bus interface, and JTAG debug interface.
IAR Embedded Workbench® for ARM provides device support on these levels:
Core support
Instruction set support in compiler, assembler, linker and debuggers
Header/DDF files
Peripheral register names in C/assembler source and debugger as well as device setup configuration files
Flash loader
For on-chip flash or off-chip EVB flash
Project examples
Varies from simple to fairly complex applications
| Device | Core support | Header | DDF | Flash loader | Example |
|---|
| A2F060M3F | Yes | No | Yes | Yes | No |
| A2F200M3F | Yes | No | Yes | Yes | No |
| A2F500M3F | Yes | No | Yes | Yes | No |
| CoreMP7 | Yes | No | No | Yes | Yes |
Note: Our partners frequently release new devices and the latest ones may not be listed here. We continually add support to new devices. Please contact IAR Systems to find out whether your new device is already supported or when it will become available.