IAR visualSTATE®

simplify large design projects with iar visualstate

IAR visualSTATE is a set of highly sophisticated and easy-to-use development tools for designing, testing and implementing embedded applications based on state machines.

IAR visualSTATE creates a graphical overview of the application, with direct graphical feedback on various levels of detail. It allows you to outline your application and then step by step add functionality at a more detailed level. The system structure is represented with a high-level, hierarchical perspective that enables you to maintain the overview of complex applications.

IAR visualSTATE provides advanced verification and validation utilities and generates very compact C/C++ code that is 100 % consistent with your system design.

IAR visualSTATE is fully integrated with IAR Embedded Workbench® to enable true state machine debugging on hardware. The key components of IAR visualSTATE allow you to design, verify, validate, prototype and generate code for your application within a completely integrated environment. IAR Systems also provides a free-standing Viewer for IAR visualSTATE users. The Viewer can be used to view but not edit model files and can be copied freely for sharing and discussing designs with stake holders outside the development team. 


Choose component


The Navigator is used for the overall handling of your embedded development project.

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The Designer is a state-of-the-art tool for designing state machines, allowing you to overview and navigate through your embedded project.

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The Validator is used to test and validate your application, to find out whether your state machine design behaves as intended.

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The Verificator lets you explore your state machine design model and embedded application, and make sure it does not contain design inconsistencies or logical gaps.

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The prototyping concept of IAR visualSTATE® makes it possible to have marketers and customers try out the new product, at a very early stage of a development project.

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The Coder automatically generates code for your embedded state machine design, giving you the benefit of having control logic code that is 100% consistent with the design.

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The generated code will execute the control logic defined in the state chart diagrams. The code is ready to be used in target, but it must be combined with a main loop that can interpret it.

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The Documenter lets you easily create an up-to-date documentation report on your project, including information on design, validation, simulation, verification, generated code and implementation.

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