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IAR visualSTATE® generates code for your embedded state machine design— automatically. This gives you the benefit of having control logic code that is 100% consistent with the design. visualSTATE employs a technology that ensures fully deterministic execution of your state machine code. Both execution time and sequence are deterministic. There is no possibility for race conditions to occur when executing concurrent hierarchical state machines in the visualSTATE implementation model. This means that your product will always behave the same.
The technique used by visualSTATE ensures that the generated code is fully consistent with your design. Every time you invoke the visualSTATE Generator to generate your code, it is always built from scratch—based only on the current design. No legacy of older versions of the design will remain.
The code generated by visualSTATE is in ISO/ANSI C or C++ source code. This gives you maximum flexibility in porting the application to a specific target.
One key concern for many developers is code size. Thanks to the well-thought method of code generation and implementation, applications based on visualSTATE will typically occupy less code and data space than a corresponding handwritten application. This means that visualSTATE is well suited even for 8- and 16-bit targets. |
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| Design your Chronos watch from TI with IAR visualSTATE. >> |
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