Examples of Earlier Master’s Theses at IAR Systems

Earlier Master’s Theses at IAR Systems

  • Measuring and modeling the power consumption in embedded systems (2017)

IAR Systems has debug probes that can both measure power consumption and collect execution trace data. This thesis investigated how to combine the capabilities of the probes with signal processing and a consumption model to compute the power consumption of individual system parts.

  • A comparison between Packrat parsing and conventional shift-reduce parsing on real-world grammars and inputs (2014)

This thesis was about implementing a parser-generator that generated a packrat parser and compare the performance with the currently used parser-generators at IAR Systems.

  • Amazing trace (2008)

Implementation of an execution history that entails decoding and analyzing a recorded instruction trace, and in particular the design and implementation of a data structure which can encapsulate the entire state of the target system, including memory and registers, over time, and to do this efficiently because the trace buffer can contain data for hundreds of thousands of instructions.

  • Transparent data compression and decompression for embedded systems (2008)

Typically, initialized data is copied from ROM to RAM during system startup. This thesis investigated different compression algorithms where the initialized data was compressed by the linker and then decompressed by the system startup code (assuming compressed size + size of decompressor < uncompressed size).

  • Optimizing stack frame layout for embedded systems (2000)

The amount of stack space that a function uses is quite important in an embedded system where resources typically are constrained. This thesis investigated a method of reducing stack usage where variables can share space on the stack.

  • Global instruction scheduling for embedded systems (1997)

Many algorithms for global instruction scheduling (scheduling that crosses base block boundaries) result in code being duplicated between various base blocks. Because memory is strictly constrained in embedded systems, some algorithms that do not duplicate code were examined, to see if the code size could be less affected.

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