IAR Embedded Workbench for RISC-V

Complete development toolchain providing one toolbox in one view, giving you one uninterrupted workflow. As a well established frontrunner in the embedded industry, you can rely on IAR Embedded Workbench to compile, analyze and debug your code in the most efficient way. 

01

Highly optimizing compiler technology

IAR Embedded Workbench offers excellent optimization technology to ensure developers that the application fits the required needs and optimizes the utilization of on-board memory and necessary speed. In current version of the toolchain, code density is already small comparing to other available tools, and more optimizations are expected in future releases to generate even smaller code.

02

Broad device support

IAR Embedded Workbench for RISC-V supports RV32 and RV32E 32-bit RISC-V cores and extensions, including RISC-V P extension for Packed-SIMD instructions. The support for custom extensions helps when working with designing custom cores with exact definitions for an application or a product. Future releases will include 64-bit support, functional safety certification and security solutions.

03

Comprehensive debugger

The C-SPY Debugger gives full control of the application in real time with full debugging capabilities even without access to the hardware using the C-SPY simulator. Native debug probe support through I-jet enables high-speed in-circuit debugging. For livestreaming of trace information for code coverage and profiling purposes, the trace probe I-jet Trace is supported. The debugger also includes a command line utility. In addition, a plugin SDK is available for easy integration of emulator interfaces, RTOSs, TCP/IP and network stacks, etc.

04

Technical support included

As the leading commercial tools supplier for RISC-V, we are able to provide worldwide technical support with our products. With a Support and Update Agreement, you also get immediate access to the latest updates and features.

Latest releases

We are constantly updating and refining our tools with new features, new device support and extended capabilities.

Version 1.40

Compiler and library optimizations

  • Several new compiler optimizations for speed and size have been introduced
  • New optimized libraries for string handling, several string.h functions have been rewritten in assembler language and are available in versions optimized for both size and speed

P extension DSP and Packed SIMD

  • Support for the vectorized instructions from the draft DSP and Packed SIMD specification, including intrinsic functions to support Andes DSP libraries Trace

Enhanced support for the SiFive Insight debug solution

  • Adding ITC (Instrumentation Trace Component) as a transport mechanism for stdout/stderr
  • Support for Trace triggers, making it possible to tailor when to start and stop trace capture

New devices

Support for these IP from Nuclei System Technology has been added

  • N200
  • N300
  • N600
Full release notes

Version 1.30

Compiler and library optimizations

  • New libraries to support and optimize performance for devices without M
  • Size-optimized libraries introduced as an option to the already existing speed-optimized versions
  • Several compiler optimizations for speed and size

P extension DSP and Packed SIMD

  • Support for the draft DSP and Packed SIMD specification, including intrinsic functions to support Andes DSP libraries.

Updated Trace capabilities

  • Function profiling makes it possible to see and analyze timing information for the functions in an application
  • Code coverage shows the percentage of code that has been executed
  • Support for on-chip RAM-buffered Trace
  • Enhanced support for SiFive Insight debug solution
  • Automatic interrupt vector setup
  • Support for automated interrupt vector setup for devices from Andes and GigaDevice

Extended C-STAT coverage for MISRA C:2012 Amendment 1

The Static analysis tool C-STAT has extended its coverage of the MISRA C:2012 Coding Standard and now fully supports MISRA C:2012 Amendment 1. This Amendment adds 14 additional rules to MISRA C:2012 with a focus on security concerns highlighted by the ISO C Secure Guidelines. Several of these address specific issues pertaining to the use of untrustworthy data, a well-known security vulnerability.

New supported devices

The following devices from GigaDevice are now supported: GD32VF103C4T6, GD32VF103C6T6, GD32VF103C8T6, GD32VF103CBT6, GD32VF103R4T6, GD32VF103R6T6, GD32VF103R8T6, GD32VF103RBT6, GD32VF103T4U6, GD32VF103T6U6, GD32VF103T8U6, GD32VF103TBU6, GD32VF103V8T6, GD32VF103VBT6

Full release notes

What type of license do you need?

Our tools are available in a flexible license model to suit your company needs. Together with our support and update agreements, you get the support you need in multiple time zones and multiple languages. Send a request for quote or contact sales to get started.

Read more about Licenses

Want to know more about IAR Embedded Workbench for RISC-V?

We are available to answer any questions about our products. To help you make the most out of your experience, you can also find plenty of information in our Learn section and at the customer portal My Pages.

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User guides and documentation

Languages and standards

The IAR C/C++ compilers offer different dialects of the C and C++ programming languages, as well as different extensions specific for embedded programming (please note that not all language standards are supported for all target implementations). The compiler can be instructed to disable extensions for strict conformance to the standards. 

A wide range of industry-standard debug and image formats compatible with most popular debuggers and emulators are supported. This includes ELF/DWARF where applicable.

ISO/ANSI C/C++ Compliance

The IAR C/C++ compilers adhere to a freestanding implementation of the following C programming language standards:

  • INCITS/ISO/IEC 9899:2018, known as C18 (Latest version only).
  • The compiler supports all C++17 features. The C++ library supports C++14 with no C++17 additions.  (Latest version only).
  • ISO/IEC 14882:2015, known as C++14
  • INCITS/ISO/IEC 9899:2012, known as C11
  • ANSI X3.159-1989, known as C89

IEEE 754 standard

IAR Embedded Workbench supports the IEEE 754 standard for floating-point arithmetic.

MISRA C

MISRA C is a software development standard for the C programming language developed by MISRA, The Motor Industry Software Reliability Association. Its aims are to facilitate code safety, portability and reliability in the context of embedded systems, specifically those systems programmed in ISO C.

The first edition of the MISRA C standard, "Guidelines for the use of the C language in vehicle based software", was produced in 1998. In 2004, a second edition was produced with many substantial changes to the guidelines, including a complete renumbering of the rules. Additionally MISRA C:2012 with extended support and MISRA C++:2008 for identifying unsafe code constructs in the C++ standard have also been added to the standards.

IAR Embedded Workbench features an add-on product C-STAT so you can check compliance with rules as defined by MISRA C:2004, MISRA C++:2008 and MISRA C:2012.

Test validation

We use the following commercial test suites to test conformance of our tools to the standards:

  • Plum Hall Validation test suite for ISO/IEC C conformance
  • Perennial EC++ Validation Suite for C++ conformance
  • Dinkum C++ Proofer to test how our libraries conform to the C and C++ standard as well as test our STL implementation against the C++ standard.

In addition to the commercial suites, we use several in-house test suites for testing new features, regression testing, corrected errors, etc.

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