CMSIS compliance

CMSIS compliance

IAR Embedded Workbench is compliant with Arm Cortex Microcontroller Software Interface Standard (CMSIS).

The Arm Cortex Microcontroller Software Interface Standard (CMSIS) provides a single, scalable interface standard across all Cortex-M series processor vendors which enables easier code re-use and sharing across software projects to reduce time-to-market for new embedded applications.

The CMSIS has been developed by Arm in close partnership with several key silicon and software vendors including Atmel, IAR Systems, Micrium, NXP, SEGGER, STMicroelectronics and Texas Instruments, and provides a common approach to interface to peripherals, real-time operating systems, and middleware components.

The standard has been designed to be fully scalable to ensure that it is suitable for all Cortex-M processor series microcontrollers from the smallest 8KB device up to devices with sophisticated communication peripherals such as Ethernet or USB-OTG. (The CMSIS memory requirement for the Core Peripheral Access Layer is less than 1KB code, less than 10 bytes RAM.)

Arm provides as part of the CMSIS the following software layers that are available for various compiler implementations:

  • Core Peripheral Access Layer: contains name definitions, address definitions and helper functions to access core registers and peripherals. It defines also an device independent interface for RTOS Kernels that includes debug channel definitions.
  • Middleware Access Layer: provides common methods to access peripherals for the software industry. The Middleware Access Layer is adapted by the Silicon Vendor for the device specific peripherals used by middleware components.

These software layers are expanded by Silicon partners with:

  • Device Peripheral Access Layer: provides definitions for all device peripherals
  • Access Functions for Peripherals (optional): provides additional helper functions for peripherals


CMSIS-DAP is the interface firmware for a debug probe that translates USB packets to the Arm core SWD or JTAG protocol. This allows the C-SPY Debugger, with the addition of just a USB cable, to connect to any development board implementing the CMSIS-DAP connection.


CMSIS version 5.3 adds the CMSIS-NN software library, a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of neural networks on Cortex-M processor cores.

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