Migration and run-time issues

Technical Note 96045

Architectures:

ARM

Component:

general

Updated:

11/6/2015 1:54 PM

Introduction

This Technical Note covers ONE specific reason for the application not to function as expected at run-time. This specific case is most often seen after migrating from IAR Embedded Workbench for ARM version 4.x or older to IAR Embedded Workbench for ARM version 5.x or newer.

There are of course many reasons for not functioning, but at least this aspect can be removed for the list of topics to troubleshoot.

Symptoms

These kind of issues can range from just a function not working as intended to the whole application malfunctioning.

Basic information

IAR Embedded Workbench for ARM version 5.x (and newer) is AEABI compliant. The AEABI standard specifies that the stack pointer must be 8-byte aligned at function entry.

The examined reason

If the application makes the stack pointer to be 4-byte aligned then the application will not work as intended. The IAR Embedded Workbench for ARM tools do not detect if your application is not correct (8-byte aligned stack) in this respect.

The IAR C/C++ Compiler for ARM will always make a proper 8-byte alignment. So the reason for the problems can be either:

  • An assembler routine that calls a C function.
  • A misaligned base address for a stack in the .icf file.

Troubleshoting this reason

  • Check the .icf file so that the base address for each stack is 8-byte-aligned.
  • Study the .s files of the project. The stack needs to be aligned (to 8 byte) before calling an C-function, and when returning from the C-function. If the stack is not aligned then the assembly source must be rewritten to add and subtract from the Stack Pointer.
  • If the examination (of the .s files) finds out that the stack is 4-byte aligned, then the assembly source needs to add and subtract 4 bytes to get an 8-byte-alignment. This adjustment can look like:
       SUB sp,sp,#4 ; push of 4 bytes for align to 8 bytes
STMFD sp!,{lr} ; Save the link register - a push of 4 bytes
LDR lr, = ReturnAddress ; Read the return address.
BX r0 ; Branch to the C function.
ReturnAddress
LDMFD sp!,{lr} ; Restore the link register - a pop of 4 bytes
ADD sp,sp,#4 ; Adjust stack - a pop of 4 bytes

Summary

With the stack checked to be 8-byte aligned, then the application may start to work as intended. Otherwise other aspects needs to be examined in the application.

 

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