Migration: Absolute placement in assembler source

Introduction

This Technical Note discusses absolute placement in assembler source and migration issues.

Background - general

There are major changes in the IAR Embedded Workbench for ARM tools between version 4.x and version 5.x (and newer).

Background - specific

The concept of "absolute placement" is removed from the assembler in IAR Embedded Workbench for ARM version 5.xx.

Discussion

The old (version 4.x) directives for absolute placement (ORG, ASEG+address and ASEGN) are not available in IAR Embedded Workbench for ARM version 5.x (and newer).

Solution

The assembler can place CODE and CONST in named segments. The linker can place the named segments at specified locations.

The assembler source can look like:

        NAME get
        PUBLIC get42
        PUBLIC jjj
        SECTION `.my_rodata`:CONST:NOROOT(2)
jjj:
        DATA
        DC32 42

        SECTION `.my_text`:CODE:NOROOT(2)
        THUMB
get42:
        LDR      R0,get42_0     ;; jjj
        LDR      R0,[R0, #+0]
        BX       LR               ;; return
        Nop
        DATA
get42_0:
        DC32 jjj
        END

This will direct CONST to the segment .my_rodata and CODE is directed to the segment .my_text

In the .icf (linker control file) file are these lines added:

define symbol _my_CODE__   = 0xEEBB0000;
define symbol _my_DATA__   = 0xAA110000;
place at address mem:_my_CODE__ { readonly section .my_text };
place at address mem:_my_DATA__ { readonly section .my_rodata };

The linker will place the section .my_text at address 0xEEBB0000, and the section .my_rodata is placed at address 0xAA110000.

Migration

It is also highly recommended to look at the "The migration process" in the IAR Embedded Workbench Migration Guide. This will give a good picture of what has to be done to migrate from version 4 to version 5 of IAR Embedded Workbench for ARM.

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