Taking RISC-V to the next level!

IAR Embedded Workbench for RISC-V now released

Tools for Risc-V

Debugging an ARM core which is not 1st on JTAG chain

Technical Note 17681



9/9/2015 11:45 AM


This Technical Note shows how to configure a JTAG connection so that ARM devices which are not first in the JTAG chain can be reached (using a J-Link debug probe).


There are two documents which applies in this situation:

  • The arm\doc\JLink_J-TraceARM.pdf in chapter 'multicore debugging' and 'Multiple devices in the scan chain' documents the basic details for settings.
  • The \arm\doc\infocenter\csarmjlink.ENU.htm shows a figure (under the heading 'Miscellaneous' how the JTAG chain must be built in order for the devices to be able to debug:

Advanced settings to solve the problem

The settings must be set so that correct TAP number and correct number of preceding bits will be used.

Step by step description

  • Connect your board to the J-Link, and connect the J-Link to your computer.
  • Start the utility arm\bin\jlink.exe and scroll until you can read information about JTAG devices. .
    An example (the board has 2 STM32 devices) is:
  • Found 4 JTAG devices, Total IRLen = 18:
    #0 Id: 0x3BA00477, IRLen: 4, IRPrint: 0x1 Cortex-M3 Core
    #1 Id: 0x06412041, IRLen: 5, IRPrint: 0x1 STM32 Boundary Scan
    #2 Id: 0x3BA00477, IRLen: 4, IRPrint: 0x1 Cortex-M3 Core
    #3 Id: 0x06412041, IRLen: 5, IRPrint: 0x1 STM32 Boundary Scan
    Cortex-M3 identified.
  • The unit you wish to connect to is the 'Coresight JTAG-DP at #2'. To find the preceding bits just count the bits that is listed before it, 4 for #1 (CoreSight JTAG-DP for 1:st device) and 5 for #2 (STM32 Boundary Scan for first device)
  • The options are set at Project > Options > J-Link/J-Trace > Connection
    • Enable the 'JTAG scan chain with multiple targets' option.
    • Specify the TAP number option as 2
    • Enable the 'Scan chain contains non-ARM devices' option.
    • Specify the number of IR bits before the ARM device to be debugged in the Preceding bits text field to 9. (Add together the 4 bits listed for TAP 0 and the 5 bits listed for TAP 1.)

Examples of number of JTAG devices, TAP numbers and number of preceding bits

Here follows 4 examples each showing the scan for JTAG-devices performed on a single ARM-device, that is the ARM-device contains an ARM-core and also contains other parts (here 0 to 2) that also are JTAG-devices.

Found 3 JTAG devices, Total IRLen = 17:
#0 Id: 0x04570041, IRLen: 08, IRPrint: 0x29, STR9 Flash
#1 Id: 0x25966041, IRLen: 04, IRPrint: 0x1, ARM966E-S Core
#2 Id: 0x1457F041, IRLen: 05, IRPrint: 0x1, STR9 Boundary Scan
Found ARM with core Id 0x25966041 (ARM9)
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x4BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-M3 identified.
Found 2 JTAG devices, Total IRLen = 9:
#0 Id: 0x3BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
#1 Id: 0x06418041, IRLen: 05, IRPrint: 0x1, STM32 Boundary Scan
Cortex-M3 identified.
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x3F0F0F0F, IRLen: 04, IRPrint: 0x1, ARM7TDMI Core
Found ARM with core Id 0x3F0F0F0F (ARM7)


It is important to choose a "reset strategy" that do not perform the reset through the TRST, as that will reset all cores.

Core suggested reset do not reset with
Cortex Core reset Normal reset
ARM 7/9 Software all where TRST is involved                                                                                     


All product names are trademarks or registered trademarks of their respective owners.

Related Tech Notes

© IAR Systems 1995-2019 - All rights reserved.

We use cookies on this website to provide you with a better experience. You need to accept cookies to continue using this site. Cookies