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This Technical Note applies to IAR Embedded Workbench for HCS12 version 3.x and newer.
The SFR area hide some RAM, and that RAM is needed by the application.
IAR Embedded Workbench for HCS12 have chip setup files for each derivative. These setup files do not move any of the memory types. This means that the reset locations are used for SFRs, EEPROM and RAM. Thus, at address 0x00 and up you typically find these three types of memory covering each other.
A Freescale MC9S12DG128 (for example) have this memory map (lowest 16 kb) from reset...
... with 1 kB of the RAM memory and all (2kb) of the EEPROM memory covered by memory types with precedence. (Precedence is SFRs, RAM, EEPROM.)
During startup of the device, set the SFR INITRM to a value that moves the RAM memory to the wanted location.
These are the changes (in the IAR files):
Sfr3 = INITRM 2 YES YES 0x20...and note that the numbering "Sfr#" must be corrected when adding the line for writing the INITRM SFR. The value "0x20" should be read:
Memory1 = RAM Memory 0x00000 0x01FFF RW...so that it instead reads...
Memory1 = RAM Memory 0x02000 0x03FFF RW
The attached example (Example for MC9S12DG128.zip) is configured with a moved RAM memory from 0x2000 to 0x3FFF.
When a .ddf file has been edited, it is a must to close the project and reopen it. (The .ddf file is read once, when the project is opened.)
The suggested solution works when downloading through the C-SPY BDM debugger, since the "BDM debugger driver" writes the SFRs with the values supplied in the .ddf file. If you want to use the device in stand-alone mode, the writes to the SFRs must be moved into __low_level_init.
The example is built, adapted and tested for "Special Single Chip Mode", so the write to INITRM need to be added in the .ddf file when using any other mode.
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